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/ Monster Media 1996 #15 / Monster Media Number 15 (Monster Media)(July 1996).ISO / graphics / gtw95268.zip / GTW95268.EXE / STL00018.DA_ / STL00018.DA
Text File  |  1996-05-01  |  116KB  |  3,369 lines
  1. #
  2. #    $Id: stl00018.da@ 2.4 1996/02/20 22:59:41 JIMK Stable $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00018.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 2MB, IBM 526 220Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Draweng32=s3x6832.drw
  14. Dac=ibm525.dac
  15. Cursor=ibm525.cur
  16. PixClk=ibm525.clk
  17. Draweng=s3x68.drw
  18.  
  19. [BoardInfo]
  20. bViewports=1
  21. bNewMMIO=1
  22. bTwoPtLine=1
  23. ValidateBAR=YES
  24. SwapVLA30A25=YES
  25.  
  26. [Desktops]
  27. 2048,768,8
  28. 1600,1200,8
  29. 1280,1024,8
  30. 1152,864,16
  31. 1152,864,8
  32. 1024,1536,8
  33. 1024,768,16
  34. 1024,768,8
  35. 800,600,32
  36. 800,600,24
  37. 800,600,16
  38. 800,600,8
  39. 640,480,32
  40. 640,480,24
  41. 640,480,16
  42. 640,480,8
  43.  
  44. [Viewports]
  45. 1600,1200,8,95,76
  46. 1600,1200,8,94,75
  47. 1600,1200,8,82,66
  48. 1600,1200,8,75,60
  49. 1280,1024,8,95,90
  50. 1280,1024,8,79,75
  51. 1280,1024,8,76,72
  52. 1280,1024,8,64,60
  53. 1152,864,16,82,90
  54. 1152,864,16,71,75
  55. 1152,864,16,64,70
  56. 1152,864,16,56,60
  57. 1152,864,8,82,90
  58. 1152,864,8,71,75
  59. 1152,864,8,64,70
  60. 1152,864,8,56,60
  61. 1024,768,16,96,120
  62. 1024,768,16,81,100
  63. 1024,768,16,64,80
  64. 1024,768,16,60,75
  65. 1024,768,16,58,72
  66. 1024,768,16,56,70
  67. 1024,768,16,48,60
  68. 1024,768,8,96,120
  69. 1024,768,8,81,100
  70. 1024,768,8,64,80
  71. 1024,768,8,60,75
  72. 1024,768,8,58,72
  73. 1024,768,8,56,70
  74. 1024,768,8,48,60
  75. 800,600,32,75,120
  76. 800,600,32,64,100
  77. 800,600,32,56,90
  78. 800,600,32,46,75
  79. 800,600,32,48,72
  80. 800,600,32,37,60
  81. 800,600,32,35,56
  82. 800,600,24,75,120
  83. 800,600,24,64,100
  84. 800,600,24,56,90
  85. 800,600,24,46,75
  86. 800,600,24,48,72
  87. 800,600,24,37,60
  88. 800,600,24,35,56
  89. 800,600,16,75,120
  90. 800,600,16,64,100
  91. 800,600,16,56,90
  92. 800,600,16,46,75
  93. 800,600,16,48,72
  94. 800,600,16,37,60
  95. 800,600,16,35,56
  96. 800,600,8,75,120
  97. 800,600,8,64,100
  98. 800,600,8,56,90
  99. 800,600,8,46,75
  100. 800,600,8,48,72
  101. 800,600,8,37,60
  102. 800,600,8,35,56
  103. 640,480,32,64,120
  104. 640,480,32,52,100
  105. 640,480,32,48,90
  106. 640,480,32,37,75
  107. 640,480,32,37,72
  108. 640,480,32,31,60
  109. 640,480,24,64,120
  110. 640,480,24,52,100
  111. 640,480,24,48,90
  112. 640,480,24,37,75
  113. 640,480,24,37,72
  114. 640,480,24,31,60
  115. 640,480,16,64,120
  116. 640,480,16,52,100
  117. 640,480,16,48,90
  118. 640,480,16,37,75
  119. 640,480,16,37,72
  120. 640,480,16,31,60
  121. 640,480,8,64,120
  122. 640,480,8,52,100
  123. 640,480,8,48,90
  124. 640,480,8,37,75
  125. 640,480,8,37,72
  126. 640,480,8,31,60
  127.  
  128. [TextMode]
  129. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  130. SHELL, I10, 0x0003,  0x0000
  131. CRT, RUN, REG_LOCK_1, 0x48
  132. CRT, RUN, REG_LOCK_2, 0xA0
  133.  
  134. [GraphicsEnable]
  135. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  136. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  137.  
  138. [GraphicsDisable]
  139. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  140. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  141.  
  142. [2048,768,8]
  143. # Setting Line Pitch
  144. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  145. CRT,RUN,EXT_MODE,0x00
  146. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  147. # Setting Engine Pitch
  148. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  149. CRT,RUN,MEM_CONFIG,0x8f
  150. # Setting Basic Mode Registers.The registers
  151. # below are neither Desktop or Viewport Regs
  152. # Unlock Sequencer
  153. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  154. # Dump Sequencer Registers
  155. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  156. # Dump Graphics Controller Registers
  157. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  158. # Dump Attribute Controller Registers
  159. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  160. # Lock Sequencer
  161. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  162. DAC_IDR, RUN, DAC_OPERATION, 0x02
  163. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  164. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  165. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  166. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  167. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  168. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  169. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  170. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  171. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  172.  
  173. [1024,1536,8]
  174. # Setting Line Pitch
  175. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  176. CRT,RUN,EXT_MODE,0x00
  177. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  178. # Setting Engine Pitch
  179. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  180. CRT,RUN,MEM_CONFIG,0x09
  181. # Setting Basic Mode Registers.The registers
  182. # below are neither Desktop or Viewport Regs
  183. # Unlock Sequencer
  184. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  185. # Dump Sequencer Registers
  186. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  187. # Dump Graphics Controller Registers
  188. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  189. # Dump Attribute Controller Registers
  190. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  191. # Lock Sequencer
  192. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  193. DAC_IDR, RUN, DAC_OPERATION, 0x02
  194. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  195. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  196. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  197. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  198. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  199. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  200. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  201. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  202. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  203.  
  204. [1600,1200,8]
  205. # Setting Line Pitch
  206. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  207. CRT,RUN,EXT_MODE,0x00
  208. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  209. # Setting Engine Pitch
  210. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  211. CRT,RUN,MEM_CONFIG,0x8b
  212. # Setting Basic Mode Registers.The registers
  213. # below are neither Desktop or Viewport Regs
  214. # Unlock Sequencer
  215. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  216. # Dump Sequencer Registers
  217. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  218. # Dump Graphics Controller Registers
  219. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  220. # Dump Attribute Controller Registers
  221. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  222. # Lock Sequencer
  223. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  224. DAC_IDR, RUN, DAC_OPERATION, 0x02
  225. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  226. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  227. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  228. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  229. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  230. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  231. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  232. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  233. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  234.  
  235. [1280,1024,8]
  236. # Setting Line Pitch
  237. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  238. CRT,RUN,EXT_MODE,0x00
  239. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  240. # Setting Engine Pitch
  241. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  242. CRT,RUN,MEM_CONFIG,0x0b
  243. # Setting Basic Mode Registers.The registers
  244. # below are neither Desktop or Viewport Regs
  245. # Unlock Sequencer
  246. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  247. # Dump Sequencer Registers
  248. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  249. # Dump Graphics Controller Registers
  250. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  251. # Dump Attribute Controller Registers
  252. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  253. # Lock Sequencer
  254. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  255. DAC_IDR, RUN, DAC_OPERATION, 0x02
  256. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  257. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  258. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  259. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  260. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  261. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  262. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  263. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  264. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  265.  
  266. [1152,864,16]
  267. # Setting Line Pitch
  268. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  269. CRT,RUN,EXT_MODE,0x00
  270. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  271. # Setting Engine Pitch
  272. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  273. CRT,RUN,MEM_CONFIG,0x89
  274. # Setting Basic Mode Registers.The registers
  275. # below are neither Desktop or Viewport Regs
  276. # Unlock Sequencer
  277. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  278. # Dump Sequencer Registers
  279. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  280. # Dump Graphics Controller Registers
  281. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  282. # Dump Attribute Controller Registers
  283. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  284. # Lock Sequencer
  285. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  286. DAC_IDR, RUN, DAC_OPERATION, 0x02
  287. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  288. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  289. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  290. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  291. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  292. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  293. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  294. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  295. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  296.  
  297. [1152,864,8]
  298. # Setting Line Pitch
  299. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  300. CRT,RUN,EXT_MODE,0x00
  301. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  302. # Setting Engine Pitch
  303. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  304. CRT,RUN,MEM_CONFIG,0x89
  305. # Setting Basic Mode Registers.The registers
  306. # below are neither Desktop or Viewport Regs
  307. # Unlock Sequencer
  308. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  309. # Dump Sequencer Registers
  310. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  311. # Dump Graphics Controller Registers
  312. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  313. # Dump Attribute Controller Registers
  314. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  315. # Lock Sequencer
  316. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  317. DAC_IDR, RUN, DAC_OPERATION, 0x02
  318. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  319. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  320. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  321. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  322. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  323. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  324. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  325. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  326. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  327.  
  328. [1024,768,16]
  329. # Setting Line Pitch
  330. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  331. CRT,RUN,EXT_MODE,0x00
  332. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  333. # Setting Engine Pitch
  334. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  335. CRT,RUN,MEM_CONFIG,0x89
  336. # Setting Basic Mode Registers.The registers
  337. # below are neither Desktop or Viewport Regs
  338. # Unlock Sequencer
  339. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  340. # Dump Sequencer Registers
  341. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  342. # Dump Graphics Controller Registers
  343. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  344. # Dump Attribute Controller Registers
  345. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  346. # Lock Sequencer
  347. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  348. DAC_IDR, RUN, DAC_OPERATION, 0x02
  349. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  350. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  351. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  352. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  353. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  354. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  355. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  356. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  357. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  358.  
  359. [1024,768,8]
  360. # Setting Line Pitch
  361. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  362. CRT,RUN,EXT_MODE,0x00
  363. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  364. # Setting Engine Pitch
  365. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  366. CRT,RUN,MEM_CONFIG,0x09
  367. # Setting Basic Mode Registers.The registers
  368. # below are neither Desktop or Viewport Regs
  369. # Unlock Sequencer
  370. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  371. # Dump Sequencer Registers
  372. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  373. # Dump Graphics Controller Registers
  374. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  375. # Dump Attribute Controller Registers
  376. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  377. # Lock Sequencer
  378. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  379. DAC_IDR, RUN, DAC_OPERATION, 0x02
  380. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  381. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  382. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  383. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  384. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  385. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  386. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  387. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  388. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  389.  
  390. [800,600,32]
  391. # Setting Line Pitch
  392. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  393. CRT,RUN,EXT_MODE,0x00
  394. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  395. # Setting Engine Pitch
  396. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  397. CRT,RUN,MEM_CONFIG,0x89
  398. # Setting Basic Mode Registers.The registers
  399. # below are neither Desktop or Viewport Regs
  400. # Unlock Sequencer
  401. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  402. # Dump Sequencer Registers
  403. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  404. # Dump Graphics Controller Registers
  405. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  406. # Dump Attribute Controller Registers
  407. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  408. # Lock Sequencer
  409. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  410. DAC_IDR, RUN, DAC_OPERATION, 0x02
  411. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  412. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  413. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  414. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  415. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  416. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  417. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  418. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  419. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  420.  
  421. [800,600,24]
  422. # Setting Line Pitch
  423. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  424. CRT,RUN,EXT_MODE,0x00
  425. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  426. # Setting Engine Pitch
  427. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  428. CRT,RUN,MEM_CONFIG,0x8b
  429. # Setting Basic Mode Registers.The registers
  430. # below are neither Desktop or Viewport Regs
  431. # Unlock Sequencer
  432. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  433. # Dump Sequencer Registers
  434. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  435. # Dump Graphics Controller Registers
  436. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  437. # Dump Attribute Controller Registers
  438. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  439. # Lock Sequencer
  440. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  441. DAC_IDR, RUN, DAC_OPERATION, 0x02
  442. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  443. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  444. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  445. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  446. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  447. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  448. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  449. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  450. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  451.  
  452. [800,600,16]
  453. # Setting Line Pitch
  454. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  455. CRT,RUN,EXT_MODE,0x00
  456. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  457. # Setting Engine Pitch
  458. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  459. CRT,RUN,MEM_CONFIG,0x89
  460. # Setting Basic Mode Registers.The registers
  461. # below are neither Desktop or Viewport Regs
  462. # Unlock Sequencer
  463. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  464. # Dump Sequencer Registers
  465. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  466. # Dump Graphics Controller Registers
  467. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  468. # Dump Attribute Controller Registers
  469. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  470. # Lock Sequencer
  471. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  472. DAC_IDR, RUN, DAC_OPERATION, 0x02
  473. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  474. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  475. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  476. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  477. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  478. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  479. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  480. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  481. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  482.  
  483. [800,600,8]
  484. # Setting Line Pitch
  485. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  486. CRT,RUN,EXT_MODE,0x00
  487. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  488. # Setting Engine Pitch
  489. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  490. CRT,RUN,MEM_CONFIG,0x89
  491. # Setting Basic Mode Registers.The registers
  492. # below are neither Desktop or Viewport Regs
  493. # Unlock Sequencer
  494. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  495. # Dump Sequencer Registers
  496. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  497. # Dump Graphics Controller Registers
  498. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  499. # Dump Attribute Controller Registers
  500. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  501. # Lock Sequencer
  502. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  503. DAC_IDR, RUN, DAC_OPERATION, 0x02
  504. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  505. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  506. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  507. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  508. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  509. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  510. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  511. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  512. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  513.  
  514. [640,480,32]
  515. # Setting Line Pitch
  516. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  517. CRT,RUN,EXT_MODE,0x00
  518. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  519. # Setting Engine Pitch
  520. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  521. CRT,RUN,MEM_CONFIG,0x89
  522. # Setting Basic Mode Registers.The registers
  523. # below are neither Desktop or Viewport Regs
  524. # Unlock Sequencer
  525. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  526. # Dump Sequencer Registers
  527. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  528. # Dump Graphics Controller Registers
  529. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  530. # Dump Attribute Controller Registers
  531. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  532. # Lock Sequencer
  533. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  534. DAC_IDR, RUN, DAC_OPERATION, 0x02
  535. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  536. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  537. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  538. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  539. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  540. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  541. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  542. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  543. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  544.  
  545. [640,480,24]
  546. # Setting Line Pitch
  547. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  548. CRT,RUN,EXT_MODE,0x00
  549. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  550. # Setting Engine Pitch
  551. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  552. CRT,RUN,MEM_CONFIG,0x8b
  553. # Setting Basic Mode Registers.The registers
  554. # below are neither Desktop or Viewport Regs
  555. # Unlock Sequencer
  556. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  557. # Dump Sequencer Registers
  558. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  559. # Dump Graphics Controller Registers
  560. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  561. # Dump Attribute Controller Registers
  562. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  563. # Lock Sequencer
  564. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  565. DAC_IDR, RUN, DAC_OPERATION, 0x02
  566. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  567. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  568. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  569. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  570. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  571. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  572. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  573. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  574. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  575.  
  576. [640,480,16]
  577. # Setting Line Pitch
  578. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  579. CRT,RUN,EXT_MODE,0x00
  580. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  581. # Setting Engine Pitch
  582. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  583. CRT,RUN,MEM_CONFIG,0x89
  584. # Setting Basic Mode Registers.The registers
  585. # below are neither Desktop or Viewport Regs
  586. # Unlock Sequencer
  587. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  588. # Dump Sequencer Registers
  589. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  590. # Dump Graphics Controller Registers
  591. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  592. # Dump Attribute Controller Registers
  593. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  594. # Lock Sequencer
  595. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  596. DAC_IDR, RUN, DAC_OPERATION, 0x02
  597. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  598. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  599. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  600. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  601. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  602. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  603. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  604. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  605. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  606.  
  607. [640,480,8]
  608. # Setting Line Pitch
  609. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  610. CRT,RUN,EXT_MODE,0x00
  611. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  612. # Setting Engine Pitch
  613. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  614. CRT,RUN,MEM_CONFIG,0x89
  615. # Setting Basic Mode Registers.The registers
  616. # below are neither Desktop or Viewport Regs
  617. # Unlock Sequencer
  618. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  619. # Dump Sequencer Registers
  620. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  621. # Dump Graphics Controller Registers
  622. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  623. # Dump Attribute Controller Registers
  624. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  625. # Lock Sequencer
  626. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  627. DAC_IDR, RUN, DAC_OPERATION, 0x02
  628. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  629. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  630. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  631. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  632. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  633. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  634. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  635. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  636. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  637.  
  638. [1600,1200,8,95,76]
  639. # Unlock CRTC
  640. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  641. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  642. CRT,RUN,REG_LOCK_1,0x48,0xa5
  643. # Dump CRT Controller Registers
  644. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x10,0xe0,0x00,0x00,0x40
  645. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  646. CRT,RUN,VERT_RETRACE_START,0xb2,0x07,0xaf
  647. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  648. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  649. CRT,RUN,MISC_1,0x15,0x79,0x14,0x11
  650. CRT,RUN,MODE_CONTROL,0x02
  651. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  652. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  653. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  654. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  655. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  656. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  657. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  658. # Lock CRTC Reg 11 for compatibility
  659. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  660. # Dump ENG Register
  661. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  662. # Dump MISCOUT Register
  663. DIR,RUN,MISC_WRITE,0xef
  664. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  665. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  666. CLK_IND, RUN, FREQ_2, 0xe0
  667. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  668. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  669. CRT,RUN,LATCH_DATA, 0x08
  670.  
  671.  
  672. [1600,1200,8,94,75]
  673. # Unlock CRTC
  674. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  675. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  676. CRT,RUN,REG_LOCK_1,0x48,0xa5
  677. # Dump CRT Controller Registers
  678. CRT,RUN,HORZ_TOTAL,0x82,0x64,0x62,0x05,0x68,0x14,0xe0,0x00,0x00,0x40
  679. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  680. CRT,RUN,VERT_RETRACE_START,0xb0,0x03,0xaf
  681. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  682. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  683. CRT,RUN,MISC_1,0x15,0x7d,0x14,0x11
  684. CRT,RUN,MODE_CONTROL,0x02
  685. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  686. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  687. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  688. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  689. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  690. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  691. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  692. # Lock CRTC Reg 11 for compatibility
  693. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  694. # Dump ENG Register
  695. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  696. # Dump MISCOUT Register
  697. DIR,RUN,MISC_WRITE,0xef
  698. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  699. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  700. CLK_IND, RUN, FREQ_2, 0xe2
  701. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  702. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  703. CRT,RUN,LATCH_DATA, 0x08
  704.  
  705.  
  706. [1600,1200,8,82,66]
  707. # Unlock CRTC
  708. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  709. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  710. CRT,RUN,REG_LOCK_1,0x48,0xa5
  711. # Dump CRT Controller Registers
  712. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  713. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  714. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  715. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  716. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  717. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  718. CRT,RUN,MODE_CONTROL,0x02
  719. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  720. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  721. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  722. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  723. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  724. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  725. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  726. # Lock CRTC Reg 11 for compatibility
  727. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  728. # Dump ENG Register
  729. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  730. # Dump MISCOUT Register
  731. DIR,RUN,MISC_WRITE,0xef
  732. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  733. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  734. CLK_IND, RUN, FREQ_2, 0xd3
  735. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  736. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  737. CRT,RUN,LATCH_DATA, 0x08
  738.  
  739. [1600,1200,8,75,60]
  740. # Unlock CRTC
  741. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  742. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  743. CRT,RUN,REG_LOCK_1,0x48,0xa5
  744. # Dump CRT Controller Registers
  745. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  746. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  747. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  748. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  749. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  750. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  751. CRT,RUN,MODE_CONTROL,0x02
  752. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  753. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  754. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  755. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  756. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  757. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  758. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  759. # Lock CRTC Reg 11 for compatibility
  760. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  761. # Dump ENG Register
  762. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  763. # Dump MISCOUT Register
  764. DIR,RUN,MISC_WRITE,0xef
  765. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  766. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  767. CLK_IND, RUN, FREQ_2, 0xcd
  768. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  769. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  770. CRT,RUN,LATCH_DATA, 0x08
  771.  
  772. [1280,1024,8,95,90]
  773. # Unlock CRTC
  774. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  775. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  776. CRT,RUN,REG_LOCK_1,0x48,0xa5
  777. # Dump CRT Controller Registers
  778. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  779. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  780. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  781. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  782. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  783. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  784. CRT,RUN,MODE_CONTROL,0x02
  785. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  786. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  787. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  788. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  789. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  790. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  791. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  792. # Lock CRTC Reg 11 for compatibility
  793. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  794. # Dump ENG Register
  795. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  796. # Dump MISCOUT Register
  797. DIR,RUN,MISC_WRITE,0xef
  798. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  799. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  800. CLK_IND, RUN, FREQ_2, 0xd0
  801. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  802. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  803. CRT,RUN,LATCH_DATA, 0x08
  804.  
  805.  
  806. [1280,1024,8,79,75]
  807. # Unlock CRTC
  808. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  809. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  810. CRT,RUN,REG_LOCK_1,0x48,0xa5
  811. # Dump CRT Controller Registers
  812. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  813. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  814. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  815. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  816. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  817. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  818. CRT,RUN,MODE_CONTROL,0x02
  819. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  820. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  821. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  822. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  823. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  824. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  825. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  826. # Lock CRTC Reg 11 for compatibility
  827. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  828. # Dump ENG Register
  829. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  830. # Dump MISCOUT Register
  831. DIR,RUN,MISC_WRITE,0xef
  832. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  833. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  834. CLK_IND, RUN, FREQ_2, 0xc1
  835. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  836. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  837. CRT,RUN,LATCH_DATA, 0x08
  838.  
  839. [1280,1024,8,76,72]
  840. # Unlock CRTC
  841. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  842. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  843. CRT,RUN,REG_LOCK_1,0x48,0xa5
  844. # Dump CRT Controller Registers
  845. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  846. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  847. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  848. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  849. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  850. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  851. CRT,RUN,MODE_CONTROL,0x02
  852. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  853. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  854. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  855. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  856. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  857. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  858. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  859. # Lock CRTC Reg 11 for compatibility
  860. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  861. # Dump ENG Register
  862. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  863. # Dump MISCOUT Register
  864. DIR,RUN,MISC_WRITE,0xef
  865. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  866. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  867. CLK_IND, RUN, FREQ_2, 0xc1
  868. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  869. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  870. CRT,RUN,LATCH_DATA, 0x08
  871.  
  872. [1280,1024,8,64,60]
  873. # Unlock CRTC
  874. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  875. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  876. CRT,RUN,REG_LOCK_1,0x48,0xa5
  877. # Dump CRT Controller Registers
  878. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  879. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  880. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  881. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  882. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  883. CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  884. CRT,RUN,MODE_CONTROL,0x02
  885. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  886. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  887. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  888. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  889. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  890. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  891. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  892. # Lock CRTC Reg 11 for compatibility
  893. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  894. # Dump ENG Register
  895. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  896. # Dump MISCOUT Register
  897. DIR,RUN,MISC_WRITE,0xef
  898. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  899. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  900. CLK_IND, RUN, FREQ_2, 0xab
  901. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  902. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  903. CRT,RUN,LATCH_DATA, 0x08
  904.  
  905. [1152,864,8,82,90]
  906. # Unlock CRTC
  907. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  908. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  909. CRT,RUN,REG_LOCK_1,0x48,0xa5
  910. # Dump CRT Controller Registers
  911. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  912. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  913. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  914. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  915. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  916. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  917. CRT,RUN,MODE_CONTROL,0x02
  918. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  919. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  920. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  921. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  922. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  923. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  924. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  925. # Lock CRTC Reg 11 for compatibility
  926. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  927. # Dump ENG Register
  928. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  929. # Dump MISCOUT Register
  930. DIR,RUN,MISC_WRITE,0xef
  931. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  932. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  933. CLK_IND, RUN, FREQ_2, 0xb9
  934. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  935. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  936. CRT,RUN,LATCH_DATA, 0x08
  937.  
  938. [1152,864,8,71,75]
  939. # Unlock CRTC
  940. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  941. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  942. CRT,RUN,REG_LOCK_1,0x48,0xa5
  943. # Dump CRT Controller Registers
  944. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  945. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  946. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  947. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  948. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  949. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  950. CRT,RUN,MODE_CONTROL,0x02
  951. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  952. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  953. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  954. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  955. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  956. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  957. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  958. # Lock CRTC Reg 11 for compatibility
  959. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  960. # Dump ENG Register
  961. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  962. # Dump MISCOUT Register
  963. DIR,RUN,MISC_WRITE,0xef
  964. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  965. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  966. CLK_IND, RUN, FREQ_2, 0xa9
  967. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  968. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  969. CRT,RUN,LATCH_DATA, 0x08
  970.  
  971. [1152,864,8,64,70]
  972. # Unlock CRTC
  973. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  974. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  975. CRT,RUN,REG_LOCK_1,0x48,0xa5
  976. # Dump CRT Controller Registers
  977. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  978. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  979. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  980. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  981. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  982. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  983. CRT,RUN,MODE_CONTROL,0x02
  984. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  985. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  986. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  987. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  988. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  989. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  990. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  991. # Lock CRTC Reg 11 for compatibility
  992. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  993. # Dump ENG Register
  994. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  995. # Dump MISCOUT Register
  996. DIR,RUN,MISC_WRITE,0xef
  997. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  998. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  999. CLK_IND, RUN, FREQ_2, 0x9b
  1000. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1001. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1002. CRT,RUN,LATCH_DATA, 0x08
  1003.  
  1004. [1152,864,8,56,60]
  1005. # Unlock CRTC
  1006. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1007. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1008. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1009. # Dump CRT Controller Registers
  1010. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1011. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1012. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1013. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1014. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1015. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1016. CRT,RUN,MODE_CONTROL,0x02
  1017. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1018. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1019. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1020. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1021. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1022. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1023. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1024. # Lock CRTC Reg 11 for compatibility
  1025. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1026. # Dump ENG Register
  1027. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1028. # Dump MISCOUT Register
  1029. DIR,RUN,MISC_WRITE,0xef
  1030. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1031. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1032. CLK_IND, RUN, FREQ_2, 0x90
  1033. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1034. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1035. CRT,RUN,LATCH_DATA, 0x08
  1036.  
  1037.  
  1038. [1152,864,16,82,90]
  1039. # Unlock CRTC
  1040. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1041. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1042. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1043. # Dump CRT Controller Registers
  1044. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1045. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1046. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1047. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1048. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1049. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1050. CRT,RUN,MODE_CONTROL,0x02
  1051. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1052. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1053. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1054. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1055. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1056. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1057. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1058. # Lock CRTC Reg 11 for compatibility
  1059. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1060. # Dump ENG Register
  1061. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1062. # Dump MISCOUT Register
  1063. DIR,RUN,MISC_WRITE,0xef
  1064. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1065. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1066. CLK_IND, RUN, FREQ_2, 0xb9
  1067. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1068. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1069. CRT,RUN,LATCH_DATA, 0x00
  1070.  
  1071.  
  1072. [1152,864,16,71,75]
  1073. # Unlock CRTC
  1074. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1075. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1076. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1077. # Dump CRT Controller Registers
  1078. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1079. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1080. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1081. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1082. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1083. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1084. CRT,RUN,MODE_CONTROL,0x02
  1085. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1086. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1087. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1088. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1089. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1090. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1091. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1092. # Lock CRTC Reg 11 for compatibility
  1093. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1094. # Dump ENG Register
  1095. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1096. # Dump MISCOUT Register
  1097. DIR,RUN,MISC_WRITE,0xef
  1098. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1099. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1100. CLK_IND, RUN, FREQ_2, 0xa9
  1101. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1102. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1103. CRT,RUN,LATCH_DATA, 0x00
  1104.  
  1105.  
  1106. [1152,864,16,64,70]
  1107. # Unlock CRTC
  1108. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1109. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1110. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1111. # Dump CRT Controller Registers
  1112. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1113. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1114. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1115. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1116. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1117. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1118. CRT,RUN,MODE_CONTROL,0x02
  1119. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1120. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1121. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1122. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1123. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1124. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1125. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1126. # Lock CRTC Reg 11 for compatibility
  1127. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1128. # Dump ENG Register
  1129. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1130. # Dump MISCOUT Register
  1131. DIR,RUN,MISC_WRITE,0xef
  1132. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1133. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1134. CLK_IND, RUN, FREQ_2, 0x9b
  1135. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1136. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1137. CRT,RUN,LATCH_DATA, 0x00
  1138.  
  1139. [1152,864,16,56,60]
  1140. # Unlock CRTC
  1141. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1142. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1143. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1144. # Dump CRT Controller Registers
  1145. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1146. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1147. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1148. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1149. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1150. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1151. CRT,RUN,MODE_CONTROL,0x02
  1152. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1153. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1154. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1155. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1156. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1157. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1158. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1159. # Lock CRTC Reg 11 for compatibility
  1160. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1161. # Dump ENG Register
  1162. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1163. # Dump MISCOUT Register
  1164. DIR,RUN,MISC_WRITE,0xef
  1165. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1166. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1167. CLK_IND, RUN, FREQ_2, 0x90
  1168. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1169. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1170. CRT,RUN,LATCH_DATA, 0x00
  1171.  
  1172. [1024,768,16,96,120]
  1173. # Unlock CRTC
  1174. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1175. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1176. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1177. # Dump CRT Controller Registers
  1178. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1179. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1180. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1181. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1182. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1183. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1184. CRT,RUN,MODE_CONTROL,0x02
  1185. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1186. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1187. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1188. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1189. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1190. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1191. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1192. # Lock CRTC Reg 11 for compatibility
  1193. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1194. # Dump ENG Register
  1195. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1196. # Dump MISCOUT Register
  1197. DIR,RUN,MISC_WRITE,0xef
  1198. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1199. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1200. CLK_IND, RUN, FREQ_2, 0xbd
  1201. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1202. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1203. CRT,RUN,LATCH_DATA, 0x00
  1204.  
  1205. [1024,768,16,81,100]
  1206. # Unlock CRTC
  1207. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1208. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1209. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1210. # Dump CRT Controller Registers
  1211. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1212. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1213. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1214. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1215. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1216. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1217. CRT,RUN,MODE_CONTROL,0x02
  1218. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1219. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1220. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1221. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1222. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1223. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1224. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1225. # Lock CRTC Reg 11 for compatibility
  1226. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1227. # Dump ENG Register
  1228. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1229. # Dump MISCOUT Register
  1230. DIR,RUN,MISC_WRITE,0xef
  1231. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1232. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1233. CLK_IND, RUN, FREQ_2, 0xa9
  1234. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1235. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1236. CRT,RUN,LATCH_DATA, 0x00
  1237.  
  1238. [1024,768,16,64,80]
  1239. # Unlock CRTC
  1240. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1241. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1242. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1243. # Dump CRT Controller Registers
  1244. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1245. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1246. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1247. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1248. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1249. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1250. CRT,RUN,MODE_CONTROL,0x02
  1251. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1252. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1253. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1254. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1255. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1256. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1257. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1258. # Lock CRTC Reg 11 for compatibility
  1259. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1260. # Dump ENG Register
  1261. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1262. # Dump MISCOUT Register
  1263. DIR,RUN,MISC_WRITE,0xef
  1264. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1265. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1266. CLK_IND, RUN, FREQ_2, 0x93
  1267. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1268. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1269. CRT,RUN,LATCH_DATA, 0x00
  1270.  
  1271. [1024,768,16,60,75]
  1272. # Unlock CRTC
  1273. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1274. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1275. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1276. # Dump CRT Controller Registers
  1277. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1278. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1279. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1280. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1281. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1282. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1283. CRT,RUN,MODE_CONTROL,0x02
  1284. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1285. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1286. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1287. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1288. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1289. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1290. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1291. # Lock CRTC Reg 11 for compatibility
  1292. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1293. # Dump ENG Register
  1294. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1295. # Dump MISCOUT Register
  1296. DIR,RUN,MISC_WRITE,0xef
  1297. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1298. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1299. CLK_IND, RUN, FREQ_2, 0x8c
  1300. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1301. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1302. CRT,RUN,LATCH_DATA, 0x00
  1303.  
  1304. [1024,768,16,58,72]
  1305. # Unlock CRTC
  1306. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1307. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1308. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1309. # Dump CRT Controller Registers
  1310. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1311. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1312. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1313. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1314. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1315. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  1316. CRT,RUN,MODE_CONTROL,0x02
  1317. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1318. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1319. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1320. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1321. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1322. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1323. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1324. # Lock CRTC Reg 11 for compatibility
  1325. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1326. # Dump ENG Register
  1327. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1328. # Dump MISCOUT Register
  1329. DIR,RUN,MISC_WRITE,0xef
  1330. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1331. CLK_IND, RUN, FREQ_2,0x88
  1332. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1333. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1334. CLK_IND, RUN, FREQ_2, 0x88
  1335. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1336. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1337. CRT,RUN,LATCH_DATA, 0x00
  1338.  
  1339. [1024,768,16,56,70]
  1340. # Unlock CRTC
  1341. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1342. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1343. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1344. # Dump CRT Controller Registers
  1345. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1346. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1347. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1348. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1349. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1350. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1351. CRT,RUN,MODE_CONTROL,0x02
  1352. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1353. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1354. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1355. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1356. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1357. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1358. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1359. # Lock CRTC Reg 11 for compatibility
  1360. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1361. # Dump ENG Register
  1362. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1363. # Dump MISCOUT Register
  1364. DIR,RUN,MISC_WRITE,0xef
  1365. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1366. CLK_IND, RUN, FREQ_2,0x88
  1367. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1368. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1369. CLK_IND, RUN, FREQ_2, 0x88
  1370. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1371. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1372. CRT,RUN,LATCH_DATA, 0x00
  1373.  
  1374. [1024,768,16,48,60]
  1375. # Unlock CRTC
  1376. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1377. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1378. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1379. # Dump CRT Controller Registers
  1380. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1381. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1382. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1383. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1384. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1385. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  1386. CRT,RUN,MODE_CONTROL,0x02
  1387. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1388. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1389. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1390. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1391. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1392. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1393. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1394. # Lock CRTC Reg 11 for compatibility
  1395. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1396. # Dump ENG Register
  1397. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1398. # Dump MISCOUT Register
  1399. DIR,RUN,MISC_WRITE,0xef
  1400. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1401. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1402. CLK_IND, RUN, FREQ_2, 0x7E
  1403. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1404. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1405. CRT,RUN,LATCH_DATA, 0x00
  1406.  
  1407. [1024,768,8,96,120]
  1408. # Unlock CRTC
  1409. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1410. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1411. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1412. # Dump CRT Controller Registers
  1413. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1414. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1415. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1416. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1417. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1418. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1419. CRT,RUN,MODE_CONTROL,0x02
  1420. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1421. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1422. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1423. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1424. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1425. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1426. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1427. # Lock CRTC Reg 11 for compatibility
  1428. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1429. # Dump ENG Register
  1430. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1431. # Dump MISCOUT Register
  1432. DIR,RUN,MISC_WRITE,0xef
  1433. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1434. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1435. CLK_IND, RUN, FREQ_2, 0xbd
  1436. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1437. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1438. CRT,RUN,LATCH_DATA, 0x08
  1439.  
  1440. [1024,768,8,81,100]
  1441. # Unlock CRTC
  1442. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1443. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1444. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1445. # Dump CRT Controller Registers
  1446. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1447. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1448. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1449. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1450. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1451. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1452. CRT,RUN,MODE_CONTROL,0x02
  1453. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1454. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1455. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1456. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1457. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1458. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1459. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1460. # Lock CRTC Reg 11 for compatibility
  1461. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1462. # Dump ENG Register
  1463. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1464. # Dump MISCOUT Register
  1465. DIR,RUN,MISC_WRITE,0xef
  1466. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1467. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1468. CLK_IND, RUN, FREQ_2, 0xa9
  1469. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1470. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1471. CRT,RUN,LATCH_DATA, 0x08
  1472.  
  1473.  
  1474. [1024,768,8,64,80]
  1475. # Unlock CRTC
  1476. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1477. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1478. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1479. # Dump CRT Controller Registers
  1480. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1481. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1482. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1483. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1484. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1485. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1486. CRT,RUN,MODE_CONTROL,0x02
  1487. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1488. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1489. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1490. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1491. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1492. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1493. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1494. # Lock CRTC Reg 11 for compatibility
  1495. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1496. # Dump ENG Register
  1497. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1498. # Dump MISCOUT Register
  1499. DIR,RUN,MISC_WRITE,0xef
  1500. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1501. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1502. CLK_IND, RUN, FREQ_2, 0x93
  1503. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1504. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1505. CRT,RUN,LATCH_DATA, 0x08
  1506.  
  1507. [1024,768,8,60,75]
  1508. # Unlock CRTC
  1509. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1510. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1511. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1512. # Dump CRT Controller Registers
  1513. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1514. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1515. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1516. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1517. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1518. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1519. CRT,RUN,MODE_CONTROL,0x02
  1520. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1521. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1522. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1523. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1524. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1525. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1526. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1527. # Lock CRTC Reg 11 for compatibility
  1528. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1529. # Dump ENG Register
  1530. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1531. # Dump MISCOUT Register
  1532. DIR,RUN,MISC_WRITE,0xef
  1533. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1534. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1535. CLK_IND, RUN, FREQ_2, 0x8c
  1536. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1537. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1538. CRT,RUN,LATCH_DATA, 0x08
  1539.  
  1540. [1024,768,8,58,72]
  1541. # Unlock CRTC
  1542. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1543. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1544. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1545. # Dump CRT Controller Registers
  1546. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1547. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1548. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1549. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1550. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1551. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1552. CRT,RUN,MODE_CONTROL,0x02
  1553. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1554. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1555. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1556. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1557. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1558. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1559. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1560. # Lock CRTC Reg 11 for compatibility
  1561. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1562. # Dump ENG Register
  1563. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1564. # Dump MISCOUT Register
  1565. DIR,RUN,MISC_WRITE,0xef
  1566. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1567. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1568. CLK_IND, RUN, FREQ_2, 0x88
  1569. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1570. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1571. CRT,RUN,LATCH_DATA, 0x08
  1572.  
  1573. [1024,768,8,56,70]
  1574. # Unlock CRTC
  1575. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1576. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1577. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1578. # Dump CRT Controller Registers
  1579. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1580. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1581. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1582. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1583. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1584. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1585. CRT,RUN,MODE_CONTROL,0x02
  1586. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1587. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1588. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1589. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1590. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1591. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1592. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1593. # Lock CRTC Reg 11 for compatibility
  1594. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1595. # Dump ENG Register
  1596. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1597. # Dump MISCOUT Register
  1598. DIR,RUN,MISC_WRITE,0xef
  1599. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1600. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1601. CLK_IND, RUN, FREQ_2, 0x88
  1602. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1603. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1604. CRT,RUN,LATCH_DATA, 0x08
  1605.  
  1606. [1024,768,8,48,60]
  1607. # Unlock CRTC
  1608. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1609. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1610. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1611. # Dump CRT Controller Registers
  1612. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1613. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1614. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1615. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1616. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1617. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1618. CRT,RUN,MODE_CONTROL,0x02
  1619. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1620. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1621. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1622. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1623. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1624. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1625. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1626. # Lock CRTC Reg 11 for compatibility
  1627. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1628. # Dump ENG Register
  1629. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1630. # Dump MISCOUT Register
  1631. DIR,RUN,MISC_WRITE,0xef
  1632. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1633. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1634. CLK_IND, RUN, FREQ_2, 0x7e
  1635. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1636. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1637. CRT,RUN,LATCH_DATA, 0x08
  1638.  
  1639. [800,600,32,75,120]
  1640. # Unlock CRTC
  1641. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1642. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1643. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1644. # Dump CRT Controller Registers
  1645. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  1646. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1647. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  1648. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1649. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1650. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1651. CRT,RUN,MODE_CONTROL,0x02
  1652. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1653. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1654. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1655. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1656. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1657. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1658. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1659. # Lock CRTC Reg 11 for compatibility
  1660. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1661. # Dump ENG Register
  1662. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1663. # Dump MISCOUT Register
  1664. DIR,RUN,MISC_WRITE,0xef
  1665. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1666. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1667. CLK_IND, RUN, FREQ_2, 0x8a
  1668. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1669. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1670. CRT,RUN,LATCH_DATA, 0x00
  1671.  
  1672. [800,600,32,64,100]
  1673. # Unlock CRTC
  1674. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1675. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1676. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1677. # Dump CRT Controller Registers
  1678. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  1679. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1680. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  1681. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1682. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1683. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  1684. CRT,RUN,MODE_CONTROL,0x02
  1685. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1686. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1687. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1688. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1689. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1690. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1691. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1692. # Lock CRTC Reg 11 for compatibility
  1693. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1694. # Dump ENG Register
  1695. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1696. # Dump MISCOUT Register
  1697. DIR,RUN,MISC_WRITE,0xef
  1698. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1699. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1700. CLK_IND, RUN, FREQ_2, 0x7e
  1701. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1702. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1703. CRT,RUN,LATCH_DATA, 0x00
  1704.  
  1705. [800,600,32,56,90]
  1706. # Unlock CRTC
  1707. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1708. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1709. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1710. # Dump CRT Controller Registers
  1711. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  1712. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1713. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  1714. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1715. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1716. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1717. CRT,RUN,MODE_CONTROL,0x02
  1718. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1719. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1720. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1721. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1722. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1723. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1724. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1725. # Lock CRTC Reg 11 for compatibility
  1726. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1727. # Dump ENG Register
  1728. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1729. # Dump MISCOUT Register
  1730. DIR,RUN,MISC_WRITE,0xef
  1731. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1732. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1733. CLK_IND, RUN, FREQ_2, 0x70
  1734. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1735. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1736. CRT,RUN,LATCH_DATA, 0x00
  1737.  
  1738. [800,600,32,46,75]
  1739. # Unlock CRTC
  1740. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1741. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1742. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1743. # Dump CRT Controller Registers
  1744. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  1745. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1746. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1747. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1748. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1749. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1750. CRT,RUN,MODE_CONTROL,0x02
  1751. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1752. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1753. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1754. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1755. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1756. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1757. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1758. # Lock CRTC Reg 11 for compatibility
  1759. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1760. # Dump ENG Register
  1761. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1762. # Dump MISCOUT Register
  1763. DIR,RUN,MISC_WRITE,0xef
  1764. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1765. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1766. CLK_IND, RUN, FREQ_2, 0x60
  1767. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1768. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1769. CRT,RUN,LATCH_DATA, 0x00
  1770.  
  1771. [800,600,32,48,72]
  1772. # Unlock CRTC
  1773. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1774. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1775. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1776. # Dump CRT Controller Registers
  1777. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  1778. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1779. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  1780. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1781. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1782. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1783. CRT,RUN,MODE_CONTROL,0x02
  1784. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1785. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1786. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1787. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1788. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1789. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1790. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1791. # Lock CRTC Reg 11 for compatibility
  1792. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1793. # Dump ENG Register
  1794. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1795. # Dump MISCOUT Register
  1796. DIR,RUN,MISC_WRITE,0xef
  1797. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1798. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1799. CLK_IND, RUN, FREQ_2, 0x61
  1800. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1801. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1802. CRT,RUN,LATCH_DATA, 0x00
  1803.  
  1804. [800,600,32,37,60]
  1805. # Unlock CRTC
  1806. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1807. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1808. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1809. # Dump CRT Controller Registers
  1810. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  1811. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1812. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1813. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1814. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1815. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1816. CRT,RUN,MODE_CONTROL,0x02
  1817. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1818. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1819. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1820. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1821. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1822. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1823. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1824. # Lock CRTC Reg 11 for compatibility
  1825. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1826. # Dump ENG Register
  1827. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1828. # Dump MISCOUT Register
  1829. DIR,RUN,MISC_WRITE,0xef
  1830. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1831. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1832. CLK_IND, RUN, FREQ_2, 0x4D
  1833. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1834. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1835. CRT,RUN,LATCH_DATA, 0x00
  1836.  
  1837.  
  1838. [800,600,32,35,56]
  1839. # Unlock CRTC
  1840. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1841. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1842. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1843. # Dump CRT Controller Registers
  1844. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  1845. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1846. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  1847. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1848. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1849. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1850. CRT,RUN,MODE_CONTROL,0x02
  1851. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1852. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1853. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1854. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1855. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1856. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1857. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1858. # Lock CRTC Reg 11 for compatibility
  1859. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1860. # Dump ENG Register
  1861. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1862. # Dump MISCOUT Register
  1863. DIR,RUN,MISC_WRITE,0xef
  1864. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1865. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1866. CLK_IND, RUN, FREQ_2, 0x45
  1867. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1868. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1869. CRT,RUN,LATCH_DATA, 0x00
  1870.  
  1871. [800,600,24,75,120]
  1872. # Unlock CRTC
  1873. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1874. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1875. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1876. # Dump CRT Controller Registers
  1877. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  1878. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1879. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  1880. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1881. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1882. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  1883. CRT,RUN,MODE_CONTROL,0x02
  1884. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1885. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1886. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1887. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1888. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1889. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1890. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1891. # Lock CRTC Reg 11 for compatibility
  1892. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1893. # Dump ENG Register
  1894. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1895. # Dump MISCOUT Register
  1896. DIR,RUN,MISC_WRITE,0xef
  1897. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1898. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1899. CLK_IND, RUN, FREQ_2, 0x8a
  1900. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1901. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1902. CRT,RUN,LATCH_DATA, 0x00
  1903.  
  1904.  
  1905. [800,600,24,64,100]
  1906. # Unlock CRTC
  1907. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1908. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1909. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1910. # Dump CRT Controller Registers
  1911. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x7a,0xf0,0x00,0x60
  1912. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1913. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  1914. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1915. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1916. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1917. CRT,RUN,MODE_CONTROL,0x02
  1918. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1919. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1920. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1921. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1922. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1923. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1924. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1925. # Lock CRTC Reg 11 for compatibility
  1926. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1927. # Dump ENG Register
  1928. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1929. # Dump MISCOUT Register
  1930. DIR,RUN,MISC_WRITE,0xef
  1931. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1932. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1933. CLK_IND, RUN, FREQ_2, 0x7e
  1934. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1935. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1936. CRT,RUN,LATCH_DATA, 0x00
  1937.  
  1938.  
  1939. [800,600,24,56,90]
  1940. # Unlock CRTC
  1941. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1942. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1943. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1944. # Dump CRT Controller Registers
  1945. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x1b,0x6f,0xf0,0x00,0x60
  1946. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1947. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  1948. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1949. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1950. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  1951. CRT,RUN,MODE_CONTROL,0x02
  1952. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1953. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1954. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1955. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1956. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1957. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1958. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1959. # Lock CRTC Reg 11 for compatibility
  1960. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1961. # Dump ENG Register
  1962. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1963. # Dump MISCOUT Register
  1964. DIR,RUN,MISC_WRITE,0xef
  1965. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1966. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1967. CLK_IND, RUN, FREQ_2, 0x70
  1968. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1969. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1970. CRT,RUN,LATCH_DATA, 0x00
  1971.  
  1972.  
  1973. [800,600,24,46,75]
  1974. # Unlock CRTC
  1975. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1976. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1977. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1978. # Dump CRT Controller Registers
  1979. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x52,0x1a,0x6f,0xe0,0x00,0x60
  1980. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1981. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1982. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1983. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1984. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1985. CRT,RUN,MODE_CONTROL,0x02
  1986. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1987. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1988. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1989. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1990. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1991. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1992. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1993. # Lock CRTC Reg 11 for compatibility
  1994. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1995. # Dump ENG Register
  1996. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1997. # Dump MISCOUT Register
  1998. DIR,RUN,MISC_WRITE,0xef
  1999. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2000. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2001. CLK_IND, RUN, FREQ_2, 0x60
  2002. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2003. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2004. CRT,RUN,LATCH_DATA, 0x00
  2005.  
  2006.  
  2007. [800,600,24,48,72]
  2008. # Unlock CRTC
  2009. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2010. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2011. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2012. # Dump CRT Controller Registers
  2013. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x8e,0xf0,0x00,0x60
  2014. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2015. CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  2016. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2017. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2018. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2019. CRT,RUN,MODE_CONTROL,0x02
  2020. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2021. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2022. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2023. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2024. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2025. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2026. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2027. # Lock CRTC Reg 11 for compatibility
  2028. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2029. # Dump ENG Register
  2030. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2031. # Dump MISCOUT Register
  2032. DIR,RUN,MISC_WRITE,0xef
  2033. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2034. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2035. CLK_IND, RUN, FREQ_2, 0x61
  2036. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2037. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2038. CRT,RUN,LATCH_DATA, 0x00
  2039.  
  2040. [800,600,24,37,60]
  2041. # Unlock CRTC
  2042. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2043. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2044. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2045. # Dump CRT Controller Registers
  2046. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x72,0xf0,0x00,0x60
  2047. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2048. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2049. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2050. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2051. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2052. CRT,RUN,MODE_CONTROL,0x02
  2053. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2054. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2055. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2056. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2057. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2058. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2059. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2060. # Lock CRTC Reg 11 for compatibility
  2061. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2062. # Dump ENG Register
  2063. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2064. # Dump MISCOUT Register
  2065. DIR,RUN,MISC_WRITE,0xef
  2066. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2067. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2068. CLK_IND, RUN, FREQ_2, 0x4d
  2069. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2070. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2071. CRT,RUN,LATCH_DATA, 0x00
  2072.  
  2073.  
  2074. [800,600,24,35,56]
  2075. # Unlock CRTC
  2076. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2077. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2078. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2079. # Dump CRT Controller Registers
  2080. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x18,0x72,0xf0,0x00,0x60
  2081. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2082. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2083. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2084. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2085. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2086. CRT,RUN,MODE_CONTROL,0x02
  2087. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2088. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2089. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2090. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2091. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2092. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2093. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2094. # Lock CRTC Reg 11 for compatibility
  2095. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2096. # Dump ENG Register
  2097. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2098. # Dump MISCOUT Register
  2099. DIR,RUN,MISC_WRITE,0xef
  2100. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2101. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2102. CLK_IND, RUN, FREQ_2, 0x45
  2103. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2104. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2105. CRT,RUN,LATCH_DATA, 0x00
  2106.  
  2107. [800,600,16,75,120]
  2108. # Unlock CRTC
  2109. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2110. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2111. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2112. # Dump CRT Controller Registers
  2113. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2114. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2115. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2116. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2117. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2118. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2119. CRT,RUN,MODE_CONTROL,0x02
  2120. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2121. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2122. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2123. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2124. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2125. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2126. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2127. # Lock CRTC Reg 11 for compatibility
  2128. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2129. # Dump ENG Register
  2130. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2131. # Dump MISCOUT Register
  2132. DIR,RUN,MISC_WRITE,0xef
  2133. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2134. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2135. CLK_IND, RUN, FREQ_2, 0x8a
  2136. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2137. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2138. CRT,RUN,LATCH_DATA, 0x00
  2139.  
  2140. [800,600,16,64,100]
  2141. # Unlock CRTC
  2142. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2143. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2144. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2145. # Dump CRT Controller Registers
  2146. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2147. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2148. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2149. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2150. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2151. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2152. CRT,RUN,MODE_CONTROL,0x02
  2153. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2154. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2155. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2156. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2157. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2158. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2159. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2160. # Lock CRTC Reg 11 for compatibility
  2161. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2162. # Dump ENG Register
  2163. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2164. # Dump MISCOUT Register
  2165. DIR,RUN,MISC_WRITE,0xef
  2166. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2167. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2168. CLK_IND, RUN, FREQ_2, 0x7e
  2169. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2170. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2171. CRT,RUN,LATCH_DATA, 0x00
  2172.  
  2173. [800,600,16,56,90]
  2174. # Unlock CRTC
  2175. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2176. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2177. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2178. # Dump CRT Controller Registers
  2179. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2180. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2181. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2182. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2183. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2184. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2185. CRT,RUN,MODE_CONTROL,0x02
  2186. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2187. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2188. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2189. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2190. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2191. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2192. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2193. # Lock CRTC Reg 11 for compatibility
  2194. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2195. # Dump ENG Register
  2196. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2197. # Dump MISCOUT Register
  2198. DIR,RUN,MISC_WRITE,0xef
  2199. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2200. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2201. CLK_IND, RUN, FREQ_2, 0x70
  2202. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2203. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2204. CRT,RUN,LATCH_DATA, 0x00
  2205.  
  2206. [800,600,16,46,75]
  2207. # Unlock CRTC
  2208. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2209. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2210. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2211. # Dump CRT Controller Registers
  2212. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2213. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2214. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2215. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2216. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2217. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2218. CRT,RUN,MODE_CONTROL,0x02
  2219. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2220. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2221. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2222. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2223. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2224. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2225. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2226. # Lock CRTC Reg 11 for compatibility
  2227. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2228. # Dump ENG Register
  2229. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2230. # Dump MISCOUT Register
  2231. DIR,RUN,MISC_WRITE,0xef
  2232. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2233. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2234. CLK_IND, RUN, FREQ_2, 0x60
  2235. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2236. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2237. CRT,RUN,LATCH_DATA, 0x00
  2238.  
  2239. [800,600,16,48,72]
  2240. # Unlock CRTC
  2241. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2242. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2243. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2244. # Dump CRT Controller Registers
  2245. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2246. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2247. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2248. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2249. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2250. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2251. CRT,RUN,MODE_CONTROL,0x02
  2252. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2253. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2254. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2255. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2256. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2257. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2258. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2259. # Lock CRTC Reg 11 for compatibility
  2260. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2261. # Dump ENG Register
  2262. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2263. # Dump MISCOUT Register
  2264. DIR,RUN,MISC_WRITE,0xef
  2265. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2266. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2267. CLK_IND, RUN, FREQ_2, 0x61
  2268. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2269. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2270. CRT,RUN,LATCH_DATA, 0x00
  2271.  
  2272. [800,600,16,37,60]
  2273. # Unlock CRTC
  2274. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2275. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2276. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2277. # Dump CRT Controller Registers
  2278. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2279. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2280. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2281. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2282. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2283. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2284. CRT,RUN,MODE_CONTROL,0x02
  2285. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2286. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2287. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2288. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2289. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2290. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2291. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2292. # Lock CRTC Reg 11 for compatibility
  2293. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2294. # Dump ENG Register
  2295. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2296. # Dump MISCOUT Register
  2297. DIR,RUN,MISC_WRITE,0xef
  2298. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2299. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2300. CLK_IND, RUN, FREQ_2, 0x4D
  2301. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2302. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2303. CRT,RUN,LATCH_DATA, 0x00
  2304.  
  2305.  
  2306. [800,600,16,35,56]
  2307. # Unlock CRTC
  2308. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2309. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2310. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2311. # Dump CRT Controller Registers
  2312. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2313. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2314. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2315. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2316. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2317. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2318. CRT,RUN,MODE_CONTROL,0x02
  2319. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2320. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2321. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2322. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2323. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2324. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2325. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2326. # Lock CRTC Reg 11 for compatibility
  2327. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2328. # Dump ENG Register
  2329. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2330. # Dump MISCOUT Register
  2331. DIR,RUN,MISC_WRITE,0xef
  2332. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2333. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2334. CLK_IND, RUN, FREQ_2, 0x45
  2335. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2336. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2337. CRT,RUN,LATCH_DATA, 0x00
  2338.  
  2339. [800,600,8,75,120]
  2340. # Unlock CRTC
  2341. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2342. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2343. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2344. # Dump CRT Controller Registers
  2345. CRT,RUN,HORZ_TOTAL,0x39,0x31,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2346. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2347. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2348. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2349. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2350. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2351. CRT,RUN,MODE_CONTROL,0x02
  2352. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2353. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2354. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2355. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2356. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2357. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2358. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2359. # Lock CRTC Reg 11 for compatibility
  2360. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2361. # Dump ENG Register
  2362. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2363. # Dump MISCOUT Register
  2364. DIR,RUN,MISC_WRITE,0xef
  2365. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2366. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2367. CLK_IND, RUN, FREQ_2, 0x8a
  2368. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2369. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2370. CRT,RUN,LATCH_DATA, 0x08
  2371.  
  2372. [800,600,8,64,100]
  2373. # Unlock CRTC
  2374. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2375. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2376. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2377. # Dump CRT Controller Registers
  2378. CRT,RUN,HORZ_TOTAL,0x3a,0x31,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2379. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2380. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2381. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2382. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2383. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2384. CRT,RUN,MODE_CONTROL,0x02
  2385. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2386. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2387. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2388. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2389. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2390. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2391. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2392. # Lock CRTC Reg 11 for compatibility
  2393. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2394. # Dump ENG Register
  2395. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2396. # Dump MISCOUT Register
  2397. DIR,RUN,MISC_WRITE,0xef
  2398. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2399. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2400. CLK_IND, RUN, FREQ_2, 0x7e
  2401. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2402. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2403. CRT,RUN,LATCH_DATA, 0x08
  2404.  
  2405. [800,600,8,56,90]
  2406. # Unlock CRTC
  2407. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2408. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2409. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2410. # Dump CRT Controller Registers
  2411. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2412. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2413. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2414. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2415. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2416. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2417. CRT,RUN,MODE_CONTROL,0x02
  2418. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2419. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2420. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2421. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2422. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2423. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2424. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2425. # Lock CRTC Reg 11 for compatibility
  2426. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2427. # Dump ENG Register
  2428. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2429. # Dump MISCOUT Register
  2430. DIR,RUN,MISC_WRITE,0xef
  2431. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2432. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2433. CLK_IND, RUN, FREQ_2, 0x70
  2434. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2435. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2436. CRT,RUN,LATCH_DATA, 0x08
  2437.  
  2438. [800,600,8,46,75]
  2439. # Unlock CRTC
  2440. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2441. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2442. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2443. # Dump CRT Controller Registers
  2444. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2445. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2446. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2447. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2448. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2449. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2450. CRT,RUN,MODE_CONTROL,0x02
  2451. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2452. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2453. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2454. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2455. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2456. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2457. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2458. # Lock CRTC Reg 11 for compatibility
  2459. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2460. # Dump ENG Register
  2461. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2462. # Dump MISCOUT Register
  2463. DIR,RUN,MISC_WRITE,0xef
  2464. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2465. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2466. CLK_IND, RUN, FREQ_2, 0x60
  2467. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2468. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2469. CRT,RUN,LATCH_DATA, 0x08
  2470.  
  2471. [800,600,8,48,72]
  2472. # Unlock CRTC
  2473. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2474. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2475. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2476. # Dump CRT Controller Registers
  2477. CRT,RUN,HORZ_TOTAL,0x3c,0x31,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2478. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2479. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2480. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2481. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2482. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2483. CRT,RUN,MODE_CONTROL,0x02
  2484. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2485. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2486. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2487. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2488. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2489. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2490. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2491. # Lock CRTC Reg 11 for compatibility
  2492. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2493. # Dump ENG Register
  2494. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2495. # Dump MISCOUT Register
  2496. DIR,RUN,MISC_WRITE,0xef
  2497. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2498. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2499. CLK_IND, RUN, FREQ_2, 0x61
  2500. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2501. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2502. CRT,RUN,LATCH_DATA, 0x08
  2503.  
  2504. [800,600,8,37,60]
  2505. # Unlock CRTC
  2506. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2507. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2508. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2509. # Dump CRT Controller Registers
  2510. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2511. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2512. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2513. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2514. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2515. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2516. CRT,RUN,MODE_CONTROL,0x02
  2517. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2518. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2519. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2520. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2521. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2522. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2523. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2524. # Lock CRTC Reg 11 for compatibility
  2525. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2526. # Dump ENG Register
  2527. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2528. # Dump MISCOUT Register
  2529. DIR,RUN,MISC_WRITE,0xef
  2530. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2531. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2532. CLK_IND, RUN, FREQ_2, 0x4D
  2533. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2534. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2535. CRT,RUN,LATCH_DATA, 0x08
  2536.  
  2537. [800,600,8,35,56]
  2538. # Unlock CRTC
  2539. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2540. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2541. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2542. # Dump CRT Controller Registers
  2543. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2544. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2545. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2546. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2547. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2548. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2549. CRT,RUN,MODE_CONTROL,0x02
  2550. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2551. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2552. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2553. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2554. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2555. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2556. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2557. # Lock CRTC Reg 11 for compatibility
  2558. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2559. # Dump ENG Register
  2560. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2561. # Dump MISCOUT Register
  2562. DIR,RUN,MISC_WRITE,0xef
  2563. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2564. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2565. CLK_IND, RUN, FREQ_2, 0x45
  2566. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2567. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2568. CRT,RUN,LATCH_DATA, 0x08
  2569.  
  2570. [640,480,32,64,120]
  2571. # Unlock CRTC
  2572. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2573. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2574. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2575. # Dump CRT Controller Registers
  2576. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2577. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2578. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2579. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2580. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2581. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2582. CRT,RUN,MODE_CONTROL,0x02
  2583. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2584. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2585. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2586. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2587. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2588. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2589. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2590. # Lock CRTC Reg 11 for compatibility
  2591. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2592. # Dump ENG Register
  2593. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2594. # Dump MISCOUT Register
  2595. DIR,RUN,MISC_WRITE,0xef
  2596. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2597. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2598. CLK_IND, RUN, FREQ_2, 0x67
  2599. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2600. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2601. CRT,RUN,LATCH_DATA, 0x00
  2602.  
  2603. [640,480,32,52,100]
  2604. # Unlock CRTC
  2605. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2606. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2607. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2608. # Dump CRT Controller Registers
  2609. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2610. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2611. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2612. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2613. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2614. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2615. CRT,RUN,MODE_CONTROL,0x02
  2616. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2617. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2618. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2619. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2620. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2621. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2622. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2623. # Lock CRTC Reg 11 for compatibility
  2624. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2625. # Dump ENG Register
  2626. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2627. # Dump MISCOUT Register
  2628. DIR,RUN,MISC_WRITE,0xef
  2629. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2630. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2631. CLK_IND, RUN, FREQ_2, 0x50
  2632. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2633. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2634. CRT,RUN,LATCH_DATA, 0x00
  2635.  
  2636. [640,480,32,48,90]
  2637. # Unlock CRTC
  2638. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2639. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2640. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2641. # Dump CRT Controller Registers
  2642. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2643. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2644. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2645. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2646. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2647. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2648. CRT,RUN,MODE_CONTROL,0x02
  2649. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2650. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2651. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2652. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2653. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2654. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2655. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2656. # Lock CRTC Reg 11 for compatibility
  2657. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2658. # Dump ENG Register
  2659. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2660. # Dump MISCOUT Register
  2661. DIR,RUN,MISC_WRITE,0xef
  2662. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2663. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2664. CLK_IND, RUN, FREQ_2, 0x4d
  2665. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2666. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2667. CRT,RUN,LATCH_DATA, 0x00
  2668.  
  2669. [640,480,32,37,75]
  2670. # Unlock CRTC
  2671. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2672. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2673. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2674. # Dump CRT Controller Registers
  2675. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  2676. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2677. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2678. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  2679. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2680. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2681. CRT,RUN,MODE_CONTROL,0x02
  2682. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2683. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2684. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2685. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2686. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2687. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2688. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2689. # Lock CRTC Reg 11 for compatibility
  2690. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2691. # Dump ENG Register
  2692. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2693. # Dump MISCOUT Register
  2694. DIR,RUN,MISC_WRITE,0xef
  2695. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2696. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2697. CLK_IND, RUN, FREQ_2, 0x3a
  2698. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2699. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2700. CRT,RUN,LATCH_DATA, 0x00
  2701.  
  2702. [640,480,32,37,72]
  2703. # Unlock CRTC
  2704. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2705. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2706. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2707. # Dump CRT Controller Registers
  2708. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  2709. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2710. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2711. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2712. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2713. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2714. CRT,RUN,MODE_CONTROL,0x02
  2715. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2716. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2717. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2718. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2719. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2720. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2721. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2722. # Lock CRTC Reg 11 for compatibility
  2723. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2724. # Dump ENG Register
  2725. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2726. # Dump MISCOUT Register
  2727. DIR,RUN,MISC_WRITE,0xef
  2728. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2729. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2730. CLK_IND, RUN, FREQ_2, 0x3a
  2731. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2732. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2733. CRT,RUN,LATCH_DATA, 0x00
  2734.  
  2735. [640,480,32,31,60]
  2736. # Unlock CRTC
  2737. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2738. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2739. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2740. # Dump CRT Controller Registers
  2741. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  2742. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2743. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2744. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2745. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2746. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2747. CRT,RUN,MODE_CONTROL,0x02
  2748. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2749. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2750. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2751. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2752. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2753. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2754. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2755. # Lock CRTC Reg 11 for compatibility
  2756. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2757. # Dump ENG Register
  2758. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2759. # Dump MISCOUT Register
  2760. DIR,RUN,MISC_WRITE,0xef
  2761. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2762. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2763. CLK_IND, RUN, FREQ_2, 0x21
  2764. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2765. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2766. CRT,RUN,LATCH_DATA, 0x00
  2767.  
  2768. [640,480,24,64,120]
  2769. # Unlock CRTC
  2770. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2771. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2772. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2773. # Dump CRT Controller Registers
  2774. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3e,0x04,0x12,0x3e,0x00,0x40
  2775. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2776. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2777. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  2778. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2779. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  2780. CRT,RUN,MODE_CONTROL,0x02
  2781. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2782. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2783. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2784. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2785. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2786. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2787. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2788. # Lock CRTC Reg 11 for compatibility
  2789. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2790. # Dump ENG Register
  2791. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2792. # Dump MISCOUT Register
  2793. DIR,RUN,MISC_WRITE,0xef
  2794. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2795. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2796. CLK_IND, RUN, FREQ_2, 0x67
  2797. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2798. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2799. CRT,RUN,LATCH_DATA, 0x00
  2800.  
  2801.  
  2802. [640,480,24,52,100]
  2803. # Unlock CRTC
  2804. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2805. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2806. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2807. # Dump CRT Controller Registers
  2808. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  2809. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2810. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2811. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  2812. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2813. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2814. CRT,RUN,MODE_CONTROL,0x02
  2815. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2816. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2817. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2818. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2819. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2820. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2821. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2822. # Lock CRTC Reg 11 for compatibility
  2823. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2824. # Dump ENG Register
  2825. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2826. # Dump MISCOUT Register
  2827. DIR,RUN,MISC_WRITE,0xef
  2828. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2829. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2830. CLK_IND, RUN, FREQ_2, 0x50
  2831. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2832. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2833. CRT,RUN,LATCH_DATA, 0x00
  2834.  
  2835. [640,480,24,48,90]
  2836. # Unlock CRTC
  2837. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2838. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2839. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2840. # Dump CRT Controller Registers
  2841. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  2842. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2843. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2844. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2845. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2846. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2847. CRT,RUN,MODE_CONTROL,0x02
  2848. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2849. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2850. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2851. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2852. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2853. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2854. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2855. # Lock CRTC Reg 11 for compatibility
  2856. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2857. # Dump ENG Register
  2858. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2859. # Dump MISCOUT Register
  2860. DIR,RUN,MISC_WRITE,0xef
  2861. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2862. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2863. CLK_IND, RUN, FREQ_2, 0x4d
  2864. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2865. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2866. CRT,RUN,LATCH_DATA, 0x00
  2867.  
  2868.  
  2869. [640,480,24,37,75]
  2870. # Unlock CRTC
  2871. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2872. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2873. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2874. # Dump CRT Controller Registers
  2875. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x40,0x04,0xf7,0x1f,0x00,0x40
  2876. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2877. CRT,RUN,VERT_RETRACE_START,0xe6,0x09,0xdf
  2878. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf7,0xab,0xff
  2879. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2880. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2881. CRT,RUN,MODE_CONTROL,0x02
  2882. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2883. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2884. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2885. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2886. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2887. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2888. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2889. # Lock CRTC Reg 11 for compatibility
  2890. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2891. # Dump ENG Register
  2892. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2893. # Dump MISCOUT Register
  2894. DIR,RUN,MISC_WRITE,0xef
  2895. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2896. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2897. CLK_IND, RUN, FREQ_2, 0x3a
  2898. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2899. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2900. CRT,RUN,LATCH_DATA, 0x00
  2901.  
  2902. [640,480,24,37,72]
  2903. # Unlock CRTC
  2904. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2905. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2906. CRT,RUN,REG_LOCK_1,0x48,0xa0
  2907. # Dump CRT Controller Registers
  2908. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3e,0x02,0x06,0x3e,0x00,0x40
  2909. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2910. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2911. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2912. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2913. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2914. CRT,RUN,MODE_CONTROL,0x02
  2915. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2916. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2917. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2918. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2919. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2920. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2921. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2922. # Lock CRTC Reg 11 for compatibility
  2923. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2924. # Dump ENG Register
  2925. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2926. # Dump MISCOUT Register
  2927. DIR,RUN,MISC_WRITE,0xef
  2928. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2929. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2930. CLK_IND, RUN, FREQ_2, 0x3a
  2931. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2932. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2933. CRT,RUN,LATCH_DATA, 0x00
  2934.  
  2935. [640,480,24,31,60]
  2936. # Unlock CRTC
  2937. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2938. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2939. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2940. # Dump CRT Controller Registers
  2941. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8a,0x3d,0x06,0x0b,0x3e,0x00,0x40
  2942. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2943. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2944. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2945. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2946. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  2947. CRT,RUN,MODE_CONTROL,0x02
  2948. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2949. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2950. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2951. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2952. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2953. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2954. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2955. # Lock CRTC Reg 11 for compatibility
  2956. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2957. # Dump ENG Register
  2958. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2959. # Dump MISCOUT Register
  2960. DIR,RUN,MISC_WRITE,0xef
  2961. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2962. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2963. CLK_IND, RUN, FREQ_2, 0x21
  2964. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2965. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2966. CRT,RUN,LATCH_DATA, 0x00
  2967.  
  2968. [640,480,16,64,120]
  2969. # Unlock CRTC
  2970. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2971. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2972. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2973. # Dump CRT Controller Registers
  2974. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2975. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2976. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2977. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2978. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2979. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2980. CRT,RUN,MODE_CONTROL,0x02
  2981. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2982. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2983. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2984. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2985. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2986. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2987. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2988. # Lock CRTC Reg 11 for compatibility
  2989. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2990. # Dump ENG Register
  2991. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2992. # Dump MISCOUT Register
  2993. DIR,RUN,MISC_WRITE,0xef
  2994. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2995. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2996. CLK_IND, RUN, FREQ_2, 0x67
  2997. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2998. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2999. CRT,RUN,LATCH_DATA, 0x00
  3000.  
  3001. [640,480,16,52,100]
  3002. # Unlock CRTC
  3003. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3004. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3005. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3006. # Dump CRT Controller Registers
  3007. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3008. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3009. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3010. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3011. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3012. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3013. CRT,RUN,MODE_CONTROL,0x02
  3014. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3015. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3016. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3017. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3018. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3019. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3020. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3021. # Lock CRTC Reg 11 for compatibility
  3022. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3023. # Dump ENG Register
  3024. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3025. # Dump MISCOUT Register
  3026. DIR,RUN,MISC_WRITE,0xef
  3027. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3028. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3029. CLK_IND, RUN, FREQ_2, 0x50
  3030. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3031. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3032. CRT,RUN,LATCH_DATA, 0x00
  3033.  
  3034. [640,480,16,48,90]
  3035. # Unlock CRTC
  3036. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3037. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3038. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3039. # Dump CRT Controller Registers
  3040. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3041. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3042. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3043. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3044. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3045. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3046. CRT,RUN,MODE_CONTROL,0x02
  3047. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3048. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3049. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3050. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3051. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3052. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3053. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3054. # Lock CRTC Reg 11 for compatibility
  3055. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3056. # Dump ENG Register
  3057. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3058. # Dump MISCOUT Register
  3059. DIR,RUN,MISC_WRITE,0xef
  3060. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3061. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3062. CLK_IND, RUN, FREQ_2, 0x4d
  3063. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3064. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3065. CRT,RUN,LATCH_DATA, 0x00
  3066.  
  3067. [640,480,16,37,75]
  3068. # Unlock CRTC
  3069. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3070. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3071. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3072. # Dump CRT Controller Registers
  3073. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3074. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3075. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3076. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3077. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3078. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3079. CRT,RUN,MODE_CONTROL,0x02
  3080. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3081. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3082. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3083. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3084. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3085. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3086. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3087. # Lock CRTC Reg 11 for compatibility
  3088. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3089. # Dump ENG Register
  3090. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3091. # Dump MISCOUT Register
  3092. DIR,RUN,MISC_WRITE,0xef
  3093. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3094. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3095. CLK_IND, RUN, FREQ_2, 0x3a
  3096. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3097. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3098. CRT,RUN,LATCH_DATA, 0x00
  3099.  
  3100. [640,480,16,37,72]
  3101. # Unlock CRTC
  3102. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3103. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3104. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3105. # Dump CRT Controller Registers
  3106. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3107. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3108. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3109. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3110. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3111. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3112. CRT,RUN,MODE_CONTROL,0x02
  3113. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3114. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3115. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3116. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3117. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3118. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3119. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3120. # Lock CRTC Reg 11 for compatibility
  3121. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3122. # Dump ENG Register
  3123. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3124. # Dump MISCOUT Register
  3125. DIR,RUN,MISC_WRITE,0xef
  3126. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3127. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3128. CLK_IND, RUN, FREQ_2, 0x3a
  3129. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3130. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3131. CRT,RUN,LATCH_DATA, 0x00
  3132.  
  3133. [640,480,16,31,60]
  3134. # Unlock CRTC
  3135. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3136. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3137. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3138. # Dump CRT Controller Registers
  3139. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3140. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3141. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3142. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3143. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3144. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3145. CRT,RUN,MODE_CONTROL,0x02
  3146. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3147. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3148. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3149. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3150. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3151. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3152. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3153. # Lock CRTC Reg 11 for compatibility
  3154. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3155. # Dump ENG Register
  3156. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3157. # Dump MISCOUT Register
  3158. DIR,RUN,MISC_WRITE,0xef
  3159. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3160. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3161. CLK_IND, RUN, FREQ_2, 0x21
  3162. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3163. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3164. CRT,RUN,LATCH_DATA, 0x00
  3165.  
  3166. [640,480,8,64,120]
  3167. # Unlock CRTC
  3168. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3169. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3170. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3171. # Dump CRT Controller Registers
  3172. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3173. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3174. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3175. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3176. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3177. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3178. CRT,RUN,MODE_CONTROL,0x02
  3179. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3180. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3181. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3182. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3183. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3184. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3185. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3186. # Lock CRTC Reg 11 for compatibility
  3187. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3188. # Dump ENG Register
  3189. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3190. # Dump MISCOUT Register
  3191. DIR,RUN,MISC_WRITE,0xef
  3192. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3193. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3194. CLK_IND, RUN, FREQ_2, 0x67
  3195. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3196. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3197. CRT,RUN,LATCH_DATA, 0x08
  3198.  
  3199. [640,480,8,52,100]
  3200. # Unlock CRTC
  3201. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3202. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3203. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3204. # Dump CRT Controller Registers
  3205. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3206. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3207. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3208. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3209. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3210. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  3211. CRT,RUN,MODE_CONTROL,0x02
  3212. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3213. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3214. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3215. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3216. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3217. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3218. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3219. # Lock CRTC Reg 11 for compatibility
  3220. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3221. # Dump ENG Register
  3222. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3223. # Dump MISCOUT Register
  3224. DIR,RUN,MISC_WRITE,0xef
  3225. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3226. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3227. CLK_IND, RUN, FREQ_2, 0x50
  3228. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3229. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3230. CRT,RUN,LATCH_DATA, 0x08
  3231.  
  3232. [640,480,8,48,90]
  3233. # Unlock CRTC
  3234. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3235. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3236. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3237. # Dump CRT Controller Registers
  3238. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3239. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3240. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3241. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3242. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3243. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3244. CRT,RUN,MODE_CONTROL,0x02
  3245. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3246. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3247. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3248. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3249. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3250. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3251. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3252. # Lock CRTC Reg 11 for compatibility
  3253. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3254. # Dump ENG Register
  3255. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3256. # Dump MISCOUT Register
  3257. DIR,RUN,MISC_WRITE,0xef
  3258. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3259. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3260. CLK_IND, RUN, FREQ_2, 0x4d
  3261. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3262. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3263. CRT,RUN,LATCH_DATA, 0x08
  3264.  
  3265. [640,480,8,37,75]
  3266. # Unlock CRTC
  3267. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3268. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3269. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3270. # Dump CRT Controller Registers
  3271. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3272. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3273. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3274. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3275. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3276. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3277. CRT,RUN,MODE_CONTROL,0x02
  3278. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3279. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3280. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3281. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3282. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3283. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3284. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3285. # Lock CRTC Reg 11 for compatibility
  3286. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3287. # Dump ENG Register
  3288. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3289. # Dump MISCOUT Register
  3290. DIR,RUN,MISC_WRITE,0xef
  3291. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3292. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3293. CLK_IND, RUN, FREQ_2, 0x3a
  3294. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3295. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3296. CRT,RUN,LATCH_DATA, 0x08
  3297.  
  3298. [640,480,8,37,72]
  3299. # Unlock CRTC
  3300. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3301. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3302. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3303. # Dump CRT Controller Registers
  3304. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3305. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3306. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3307. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3308. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3309. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3310. CRT,RUN,MODE_CONTROL,0x02
  3311. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3312. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3313. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3314. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3315. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3316. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3317. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3318. # Lock CRTC Reg 11 for compatibility
  3319. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3320. # Dump ENG Register
  3321. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3322. # Dump MISCOUT Register
  3323. DIR,RUN,MISC_WRITE,0xef
  3324. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3325. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3326. CLK_IND, RUN, FREQ_2, 0x3a
  3327. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3328. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3329. CRT,RUN,LATCH_DATA, 0x08
  3330.  
  3331. [640,480,8,31,60]
  3332. # Unlock CRTC
  3333. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3334. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3335. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3336. # Dump CRT Controller Registers
  3337. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3338. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3339. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3340. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3341. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3342. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3343. CRT,RUN,MODE_CONTROL,0x02
  3344. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3345. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3346. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3347. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3348. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3349. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3350. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3351. # Lock CRTC Reg 11 for compatibility
  3352. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3353. # Dump ENG Register
  3354. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3355. # Dump MISCOUT Register
  3356. DIR,RUN,MISC_WRITE,0xef
  3357. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3358. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3359. CLK_IND, RUN, FREQ_2, 0x21
  3360. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3361. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3362. CRT,RUN,LATCH_DATA, 0x08
  3363.  
  3364.  
  3365.  
  3366.  
  3367.  
  3368.  
  3369.